LFCSP major headache

Posted in July 21st, 2006

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The AD7142 only comes in a LFCSP, and as much as I’d like to use it, the packaging looks to be a major headache. I went down this path about a year ago with another part in a very simliar package. These are not for the timid to prototype with.

The high density, leadless package, and thermal paddle all contribute to the difficulty. Great in production, but a hassle in the lab.

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Some interesting things did come to light in this app note.

1. Board coefficient of expansion can be problematic. I see this more of an issue with high dissipation parts, but realistically, temperature swings are going to aggravate the solder joints if FR4 is used.

2. As expected land pattern is critical. The good news is, unlike most parts/vendors, Analog Devices calls out a recommended pattern.

3. The thermal paddles performance is obviously going to be affected by solder voids. This is aggravated by the large quantity of via’s required under the paddle. Close watch on solder flow is key. How to do this without an xray machine otoh is a problem. I guess the key is a good process, developed through destructive testing.

4. NSMD (non solder mask defined pads) are a key part of mounting strategy. While on the outset, this seems counterproductive, the ability to tightly control solder mask in such a small area, combined with its inherrant thickness makes it more trouble than its worth in most cases. As a result, a trench mask is the way to go.

5. Solder voids under the paddle can be minimized by the use of a segmented stencil. This makes a lot of sense, and it is not real intuitive, as effectively, you are reducing solder volume.

6. For prototyping and rework, stencil and screen the part, not the pcb. Accurate placement is a must.

7. A dual axis imager is used to get the placement on the money. As usual, they promote self centering subject to a 50% off pad criteria. Personally I think thats a little overly optimistic, esp when they recommend dual axis imaging for alignment.